·
Solid understanding of
transistor level fundamentals especially the switching characteristics of
transistors and inverters
·
Strong experience in
design/layout of I/O blocks like GPIOs, custom I/Os etc
·
Strong understanding of gpio
characterization
·
Strong understanding of the
I/O components like
×
Level-shifters,
×
Receiver
×
Predriver
×
Drivers,
×
Bias generators, etc.
·
Should have experience in
transistor level simulations, preferably spice simulations
·
Good knowledge and preferably
hands-on experience in design/layout of I/O blocks like GPIOs, custom I/Os,
misc I/Os, etc
·
Good understanding of ESD concepts
needed for designing IO pads
·
Good knowledge of RLC
characteristics of interconnect/package wires
·
Experience in Verilog coding
is an added advantage